The present invention relates generally to the fabrication of semiconductor integrated circuits (IC""s), and more particularly to the fabrication of memory IC""s.
Semiconductor devices are used in a variety of electronic applications, such as personal computers and cellular phones, for example. The semiconductor industry in general is being driven to decrease the size of semiconductor devices located on integrated circuits. Miniaturization is generally needed to accommodate the increasing density of circuits necessary for today""s semiconductor products.
One semiconductor product widely used in electronic systems for storing data is a semiconductor memory device, and a common type of semiconductor memory device is a dynamic random access memory (DRAM). A DRAM typically includes millions or billions of individual DRAM cells arranged in an array, with each cell storing one bit of data. A DRAM memory cell typically includes an access field effect transistor (FET) and a storage capacitor. The access FET allows the transfer of data charges to and from the storage capacitor during reading and writing operations. In addition, the data charges on the storage capacitor are periodically refreshed during a refresh operation.
More recent DRAM designs involve manufacturing storage capacitors that comprise deep trenches and an overlying transistor disposed over the deep trench storage cells formed in a subsequent layer. This type of DRAM structure is referred to as a vertical DRAM.
An interim structure often used in the formation of deep trench storage cells is a sacrificial collar. A sacrificial collar comprises a thin insulating collar layer that is formed at the top of a trench that is left remaining during trench processing, for example, during bottle etch and doping of semiconductor substrate within the deep trench. The sacrificial collar is removed prior to the completion of the semiconductor memory device, and is replaced by a permanent collar after the deep trench processing is completed.
Embodiments of the present invention achieve technical advantages as a process flow for a sacrificial collar scheme for a trench in a semiconductor device, such as a DRAM. A semiconductor layer is deposited and used as a mask, by doping the top portion of the semiconductor layer within the trench. The undoped layer of semiconductor material is removed, and the doped semiconductor material acts as a mask for the underlying nitride layer which is etched to form a sacrificial collar in accordance with an embodiment of the invention.
Disclosed is a method of manufacturing a semiconductor device, comprising providing a semiconductor substrate, depositing a first material layer over the substrate, and depositing a semiconductor layer over the first material layer. The method includes doping a portion of the semiconductor layer, leaving undoped semiconductor layer portions and creating doped semiconductor layer portions, and removing the undoped semiconductor layer portion. The method also includes removing portions of the first material layer, using the doped semiconductor layer portion as a mask, and removing the doped semiconductor layer portion.
Also disclosed is a method of forming a sacrificial collar in a semiconductor device having a plurality of trenches formed in a substrate, the method comprised of depositing a first nitride layer over the substrate, depositing a semiconductor layer over the first nitride layer, and doping a top portion of the semiconductor layer within the trenches, leaving undoped semiconductor layer portions in the bottom of the trenches. The method includes removing the undoped semiconductor layer portion from the trench bottoms, removing portions of the first nitride layer from the trench bottoms, using the doped semiconductor layer portion as a mask, and leaving portions of the first nitride layer at the top of the trenches to form a sacrificial collar. The doped semiconductor layer portion is removed.
In another embodiment, disclosed is a method of forming a sacrificial collar in a semiconductor device having a plurality of trenches formed in a substrate, the trenches having sidewalls. The method comprises forming a first oxide layer on the trench sidewalls, depositing a first nitride layer over the first oxide layer, depositing a semiconductor layer over the first nitride layer, and doping a top portion of the semiconductor layer within the trenches, leaving undoped semiconductor layer portions in the bottom of the trenches. The method includes removing the undoped semiconductor layer portion from the trench bottoms, removing portions of the first nitride layer from the trench bottoms, using the doped semiconductor layer portion as a mask, leaving portions of the first nitride layer at the top of the trenches to form a sacrificial collar, removing the first oxide layer at the bottom part of the trenches, and removing the doped semiconductor layer portion.
Further disclosed is a method of forming a sacrificial collar in a semiconductor device having a plurality of trenches formed in a substrate, the method comprising depositing a first nitride layer over the substrate, depositing a semiconductor layer over the first nitride layer, depositing a second nitride layer over the semiconductor layer, and removing a top portion of the second nitride layer within the trenches to leave a bottom portion of the second nitride layer within the trenches and leave a top portion of the semiconductor layer portion exposed. The method includes doping the semiconductor layer top portion within the trenches, leaving undoped semiconductor layer portions in the bottom of the trenches, removing the bottom portion of the second nitride layer, and removing the undoped semiconductor layer portion from the trench bottoms. Portions of the first nitride layer are removed from the trench bottoms, using the doped semiconductor layer portion as a mask, leaving portions of the first nitride layer at the top of the trenches to form a sacrificial collar, and the doped semiconductor layer portion is removed.
Advantages of embodiments of the invention include providing the ability to form a sacrificial collar without requiring the use of a polysilicon fill within the deep trenches, which polysilicon is difficult to remove and may cause problems in semiconductor processing by forming black silicon and causing increased particulates in wafer fabrication equipment, as examples. Rather than using a polysilicon trench fill as in prior art sacrificial collar processes, a resist fill is used to mask the semiconductor layer while the upper portion of the semiconductor layer is doped. The resist is removed, and the undoped of the semiconductor layer is removed. The remaining doped polysilicon layer acts as a mask for the formation of the sacrificial collar in accordance with an embodiment of the present invention.
In an alternative embodiment, a first nitride layer is deposited over the semiconductor layer, and the nitride is used as a mask, so that high temperature gas phase doping may be used to dope the semiconductor layer which is then used as a mask for the underlying first nitride layer.
The sacrificial collar thickness may be well controlled because it is preferably formed in a deposition process. Advantageously, thicker sacrificial collars may be formed than in prior art processes in which sacrificial collars are formed by nitridation.